Effect of plasma and staging time on the underfill voids in fine pitch flip-chip package

• Main Authors: Wakeel, Saif, Meng, Dominic Koey Poh, Chin, Stella Wong Wun, Philipsen, Jos, Gommers, Pieter, Joosten, Annelies
• Format: Conference or Workshop Item
• Published: 2021
• Subjects: TJ Mechanical engineering and machinery
• Online Access: http://eprints.um.edu.my/35539/; https://www.scopus.com/inward/record.uri?eid=2-s2.0-85118425260&doi=10.1109%2fICEPT52650.2021.9567952&partnerID=40&md5=4b558ce5f99e679349e004596f961069

Underfill voids have been one of the major reliability concerns in flip-chip packaging specially in a fine pitch. Therefore, monitoring of process based root causes of the void formation is significantly important. In this study, 7.5×7.5 Si die was bonded on two 17 mm *17 mm2 substrates viz. S1 and...