Simulation of planar and FINFET transistor model for digital gate applications: article / Siti Aishah Abu Salim
Abstract -In this work, FinFET (dual-gate)r transistor is simulated using computer added design (CAD) tools to replacethe conventional planar MOSFET. Now a day planar transistors are no longer clean due to current leakage during one-off switches. Thus, these effects have caused some head and power...
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| Format: | Article |
| Language: | English |
| Published: |
2013
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| Online Access: | https://ir.uitm.edu.my/id/eprint/105274/1/105274.pdf https://ir.uitm.edu.my/id/eprint/105274/ |
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