A new scan design technique based on pre-synthesis thru functions

• 主要な著者: Chia, Yee Ooi, Fujiwara, Hideo
• フォーマット: Book Section
• 出版事項: IEEE Computer Society 2006
• 主題: TK Electrical engineering. Electronics Nuclear engineering
• オンライン･アクセス: http://eprints.utm.my/id/eprint/9313/; http://ieeexplore.ieee.org/document/4030763/?reload=true

VLSI design has moved from bottom-up design approach to top-down design methodology with the aid of advanced Computer-Aided Design (CAD) technology. This paper introduces a new scan design technique as a design-for-test (DFT) method for sequential circuits by exploiting the information of thru funct...