A new design-for-testability method based on thru-testability
Partial scan and non-scan techniques allow test generation of high fault coverage for sequential circuits with less area overhead and less performance degradation than full scan technique. In most of these techniques, extra logic (e.g. a multiplexer introduced by partial scan) is added to permit a d...
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| Main Authors: | , |
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| Format: | Article |
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Springer Netherlands
2011
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| Subjects: | |
| Online Access: | http://eprints.utm.my/id/eprint/28586/ http://dx.doi.org/10.1007/s10836-011-5241-8 |
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