FPGA implementation of multiplier for floating-point numbers based on IEEE 754-2008 standard
This paper illustrates designing and implementation process of floating point multiplier on Field Programmable Gate Array (FPGA). Floating-point operations are used in many fields like, digital signal processing, digital image processing, multimedia data analysis, etc. Implementation of fl...
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Main Authors: | Shyamsi, M., Ibrahimy, Muhammad Ibn, Motakabber, S. M. A., Ahsan, M. R. |
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Format: | Article |
Language: | English |
Published: |
Journal of Communications Technology, Electronics and Computer Science
2015
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Subjects: | |
Online Access: | http://irep.iium.edu.my/45503/1/2-50-1-PB.pdf http://irep.iium.edu.my/45503/ http://jctecs.com/index.php/com/index |
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