Design of a 5GHz phase-locked loop
Noise or jitter performance is a major concern in the design of phase-locked loop (PLL). Linearity and speed issues are of relevance when receiving data at gigahertz speed. The main function of a PLL circuit is to generate stable higher frequencies (GHz) output from a lower input frequency signal. P...
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Main Authors: | , , |
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Format: | Conference or Workshop Item |
Language: | English |
Published: |
2011
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Subjects: | |
Online Access: | http://irep.iium.edu.my/15122/1/06088316.pdf http://irep.iium.edu.my/15122/ http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=6086117 |
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