Design of a 5GHz phase-locked loop
Noise or jitter performance is a major concern in the design of phase-locked loop (PLL). Linearity and speed issues are of relevance when receiving data at gigahertz speed. The main function of a PLL circuit is to generate stable higher frequencies (GHz) output from a lower input frequency signal. P...
Saved in:
| Main Authors: | , , |
|---|---|
| Format: | Conference or Workshop Item |
| Language: | English |
| Published: |
2011
|
| Subjects: | |
| Online Access: | http://irep.iium.edu.my/15122/1/06088316.pdf http://irep.iium.edu.my/15122/ http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=6086117 |
| Tags: |
Add Tag
No Tags, Be the first to tag this record!
|