RF substrate noise characterization for CMOS 0.18μm
In the submicron technologies, RF noise isolation is becoming increasingly important. In this paper, the investigations of the on-chip RF isolation techniques were carried out. The chosen isolation structures were the Deep Nwell (or triple well isolation) and the P+ Guard Ring. The test structures w...
Saved in:
Main Authors: | Ishak, I.S., Keating, R.A., Chakrabarty, C.K. |
---|---|
Format: | Conference Paper |
Language: | en_US |
Published: |
2017
|
Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
Similar Items
-
RF substrate noise characterization for CMOS 0.18?m
by: Ishak I.S., et al.
Published: (2023) -
Characterization of RF substrate noise isolation and bandgap reference voltage of 0.18 um CMOS
by: Izahan Syemylona Ishak
Published: (2023) -
Design Of 0.18-μm CMOS Mixer For Medradio Application
by: Abu Bakar, Mohamad Redzuan
Published: (2018) -
Low Voltage CMOS Schmitt Trigger In 0.18μm Technology
by: Arith, Faiz, et al.
Published: (2013) -
Design Of Low Noise Amplifier For Ultra-Wideband (UWB) Applications Using Silterra 0.18 μm Cmos Technology
by: Ooi, Wei Ching
Published: (2006)