Threshold voltage optimization in a 22nm High-k/Salicide PMOS device

• Main Authors: Afifah Maheran, A.H., Menon, P.S., Ahmad, I., Yusoff, Z.
• Published: 2017
• Online Access: http://dspace.uniten.edu.my:8080/jspui/handle/123456789/5213

In this article, we examine the effect of four process parameters and two noise parameters on the threshold voltage (Vth) of a 22nm gate length PMOS device. The gate of the device uses titanium dioxide (TiO2) as the high permittivity material (high-k) layer to replace the traditional silicon dioxide...