Simulation for forming Shallow Trench Isolation in the IC using TCAD tools

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Bibliographic Details
Main Author: Mohd Faiz Mohd Fauzan
Other Authors: Ruslinda A. Rahim (Advisor)
Format: Learning Object
Language:English
Published: Universiti Malaysia Perlis 2008
Subjects:
Online Access:http://dspace.unimap.edu.my/xmlui/handle/123456789/1977
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spelling my.unimap-19772008-09-09T04:10:51Z Simulation for forming Shallow Trench Isolation in the IC using TCAD tools Mohd Faiz Mohd Fauzan Ruslinda A. Rahim (Advisor) Integrated circuits Computer-aided design Silicon Silicon nitride Silicon oxide Metal oxide semiconductors, Complementary Shallow Trench Isolation (STI) Access is limited to UniMAP community. A simulation for forming shallow trench isolation (STI) in the integrated circuit (IC) is introduced. Firstly, using the Taurus Workbench-tools, the first silicon oxide layer and a silicon nitride layer are formed subsequently on the silicon substrate. The lithography and etching are used to open a shallow trench. Then thermal oxidation is performed. The following step is to form the shallow trench isolation by forming the second silicon oxide with high density plasma enhanced chemical vapor deposition. Then an organic spin-on-glass is coated and low temperature baking is performed. After that, partial etching back is formed to remove spin-on-glass outside the shallow trench. This etching recipe has high selectivity between the second silicon oxide layer to spinon-glass. Then curing at temperature above 800°C and etching back are performed with silicon nitride as end point. 2008-09-07T04:17:42Z 2008-09-07T04:17:42Z 2008-04 Learning Object http://hdl.handle.net/123456789/1977 en Universiti Malaysia Perlis School of Microelectronic Engineering
institution Universiti Malaysia Perlis
building UniMAP Library
collection Institutional Repository
continent Asia
country Malaysia
content_provider Universiti Malaysia Perlis
content_source UniMAP Library Digital Repository
url_provider http://dspace.unimap.edu.my/
language English
topic Integrated circuits
Computer-aided design
Silicon
Silicon nitride
Silicon oxide
Metal oxide semiconductors, Complementary
Shallow Trench Isolation (STI)
spellingShingle Integrated circuits
Computer-aided design
Silicon
Silicon nitride
Silicon oxide
Metal oxide semiconductors, Complementary
Shallow Trench Isolation (STI)
Mohd Faiz Mohd Fauzan
Simulation for forming Shallow Trench Isolation in the IC using TCAD tools
description Access is limited to UniMAP community.
author2 Ruslinda A. Rahim (Advisor)
author_facet Ruslinda A. Rahim (Advisor)
Mohd Faiz Mohd Fauzan
format Learning Object
author Mohd Faiz Mohd Fauzan
author_sort Mohd Faiz Mohd Fauzan
title Simulation for forming Shallow Trench Isolation in the IC using TCAD tools
title_short Simulation for forming Shallow Trench Isolation in the IC using TCAD tools
title_full Simulation for forming Shallow Trench Isolation in the IC using TCAD tools
title_fullStr Simulation for forming Shallow Trench Isolation in the IC using TCAD tools
title_full_unstemmed Simulation for forming Shallow Trench Isolation in the IC using TCAD tools
title_sort simulation for forming shallow trench isolation in the ic using tcad tools
publisher Universiti Malaysia Perlis
publishDate 2008
url http://dspace.unimap.edu.my/xmlui/handle/123456789/1977
_version_ 1643787511842996224
score 13.222552