Resistive Open Faults Detectability Analysis and Implications for Testing Low Power Nanometric ICs
Resistive open faults (ROFs) represent common manufacturing defects in IC interconnects and result in delay faults that cause timing failures and reliability risks. The nonmonotonic dependence of ROF-induced delay faults on the supply voltage (VDD) poses a concern as to whether single-VDD testing wi...
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my.utp.eprints.119422017-01-19T08:20:58Z Resistive Open Faults Detectability Analysis and Implications for Testing Low Power Nanometric ICs Mohammadat, Mohamed Tag Elsir Zain Ali , Noohul Basheer Hussin, Fawnizu Azmadi Zwolinski, Mark Resistive open faults (ROFs) represent common manufacturing defects in IC interconnects and result in delay faults that cause timing failures and reliability risks. The nonmonotonic dependence of ROF-induced delay faults on the supply voltage (VDD) poses a concern as to whether single-VDD testing will suffice for low power nanometric designs. Our analysis shows multi-VDD tests could be required, depending on the test speed. This knowledge can be exploited in small delay fault testing to reduce the chances of test escapes while minimizing cost. IEEE 2015 Article PeerReviewed application/pdf http://eprints.utp.edu.my/11942/1/06782673.pdf Mohammadat, Mohamed Tag Elsir and Zain Ali , Noohul Basheer and Hussin, Fawnizu Azmadi and Zwolinski, Mark (2015) Resistive Open Faults Detectability Analysis and Implications for Testing Low Power Nanometric ICs. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 23 (3). pp. 580-583. ISSN 1063-8210 http://eprints.utp.edu.my/11942/ |
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Resistive open faults (ROFs) represent common manufacturing defects in IC interconnects and result in delay faults that cause timing failures and reliability risks. The nonmonotonic dependence of ROF-induced delay faults on the supply voltage (VDD) poses a concern as to whether single-VDD testing will suffice for low power nanometric designs. Our analysis shows multi-VDD tests could be required, depending on the test speed. This knowledge can be exploited in small delay fault testing to reduce the chances of test escapes while minimizing cost. |
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Mohammadat, Mohamed Tag Elsir Zain Ali , Noohul Basheer Hussin, Fawnizu Azmadi Zwolinski, Mark |
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Mohammadat, Mohamed Tag Elsir Zain Ali , Noohul Basheer Hussin, Fawnizu Azmadi Zwolinski, Mark Resistive Open Faults Detectability Analysis and Implications for Testing Low Power Nanometric ICs |
author_facet |
Mohammadat, Mohamed Tag Elsir Zain Ali , Noohul Basheer Hussin, Fawnizu Azmadi Zwolinski, Mark |
author_sort |
Mohammadat, Mohamed Tag Elsir |
title |
Resistive Open Faults Detectability Analysis and Implications for Testing Low Power Nanometric ICs |
title_short |
Resistive Open Faults Detectability Analysis and Implications for Testing Low Power Nanometric ICs |
title_full |
Resistive Open Faults Detectability Analysis and Implications for Testing Low Power Nanometric ICs |
title_fullStr |
Resistive Open Faults Detectability Analysis and Implications for Testing Low Power Nanometric ICs |
title_full_unstemmed |
Resistive Open Faults Detectability Analysis and Implications for Testing Low Power Nanometric ICs |
title_sort |
resistive open faults detectability analysis and implications for testing low power nanometric ics |
publisher |
IEEE |
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2015 |
url |
http://eprints.utp.edu.my/11942/1/06782673.pdf http://eprints.utp.edu.my/11942/ |
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