Low-voltage high-speed programming gate-all-around floating gate memory cell with tunnel barrier engineering
The aim of this study is to investigate the memory performances of gate-all-around floating gate (GAA-FG) memory cell implementing engineered tunnel barrier concept of variable oxide thickness (VARIOT) of low-k/high-k for several high-k (i.e., Si3N4, Al2O3, HfO2, and ZrO2) with low-k SiO2 using thre...
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主要な著者: | , , |
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フォーマット: | 論文 |
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Japan Society of Applied Physics
2018
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オンライン・アクセス: | http://eprints.utm.my/id/eprint/84855/ http://dx.doi.org/10.7567/JJAP.57.06KC02 |
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