Hamzah, A. (2018). Low-voltage high-speed programming gate-all-around floating gate memory cell with tunnel barrier engineering. Japan Society of Applied Physics.
Chicago Style CitationHamzah, Afiq. Low-voltage High-speed Programming Gate-all-around Floating Gate Memory Cell With Tunnel Barrier Engineering. Japan Society of Applied Physics, 2018.
MLA CitationHamzah, Afiq. Low-voltage High-speed Programming Gate-all-around Floating Gate Memory Cell With Tunnel Barrier Engineering. Japan Society of Applied Physics, 2018.
Warning: These citations may not always be 100% accurate.