Asymmetrical nine-level inverter topology with reduce power semicondutor devices

• Main Authors: Arif, M. S., Ayob, S. M., Salam, Z.
• Format: Article
• Language: English
• Published: Universitas Ahmad Dahlan 2018
• Subjects: TK Electrical engineering. Electronics Nuclear engineering
• Online Access: http://eprints.utm.my/id/eprint/79807/1/MSaadArif2018_AsymmetricalNineLevelInverterTopology.pdf; http://eprints.utm.my/id/eprint/79807/; http://dx.doi.org/10.12928/TELKOMNIKA.v16i1.8520

In this paper a new single-phase multilevel inverter topology is presented. Proposed topology is capable of producing nine-level output voltage with reduce device counts. It can be achieved by arranging available switches and dc sources in a fashion such that the maximum combination of addition and...