RF substrate noise characterization for CMOS 0.18?m

In the submicron technologies, RF noise isolation is becoming increasingly important. In this paper, the investigations of the on-chip RF isolation techniques were carried out. The chosen isolation structures were the Deep Nwell (or triple well isolation) and the P+ Guard Ring. The test structures w...

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Main Authors: Ishak I.S., Keating R.A., Chakrabarty C.K.
Other Authors: 9942783300
Format: Conference paper
Published: 2023
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spelling my.uniten.dspace-298852023-12-28T16:58:03Z RF substrate noise characterization for CMOS 0.18?m Ishak I.S. Keating R.A. Chakrabarty C.K. 9942783300 9943035200 6701755282 Deep N-well (DNW) Guard ring (GR) Radio Frequency (RF) Substrate noise suppression Design Microwave isolators Radio systems Signal processing Coupling effects RF isolation techniques Submicron technologies CMOS integrated circuits In the submicron technologies, RF noise isolation is becoming increasingly important. In this paper, the investigations of the on-chip RF isolation techniques were carried out. The chosen isolation structures were the Deep Nwell (or triple well isolation) and the P+ Guard Ring. The test structures were designed and fabricated using Silterra CMOS 0.18?m Mixed Signal process. The design parameter investigated was the distance between the isolation ring and the output terminal (Sout) in which the substrate coupling effects with and without deep nwell were characterized. � 2004 IEEE. Final 2023-12-28T08:58:03Z 2023-12-28T08:58:03Z 2004 Conference paper 2-s2.0-29044444843 https://www.scopus.com/inward/record.uri?eid=2-s2.0-29044444843&partnerID=40&md5=aa2dd07c688129917d55a6a5703a22ac https://irepository.uniten.edu.my/handle/123456789/29885 60 63 Scopus
institution Universiti Tenaga Nasional
building UNITEN Library
collection Institutional Repository
continent Asia
country Malaysia
content_provider Universiti Tenaga Nasional
content_source UNITEN Institutional Repository
url_provider http://dspace.uniten.edu.my/
topic Deep N-well (DNW)
Guard ring (GR)
Radio Frequency (RF)
Substrate noise suppression
Design
Microwave isolators
Radio systems
Signal processing
Coupling effects
RF isolation techniques
Submicron technologies
CMOS integrated circuits
spellingShingle Deep N-well (DNW)
Guard ring (GR)
Radio Frequency (RF)
Substrate noise suppression
Design
Microwave isolators
Radio systems
Signal processing
Coupling effects
RF isolation techniques
Submicron technologies
CMOS integrated circuits
Ishak I.S.
Keating R.A.
Chakrabarty C.K.
RF substrate noise characterization for CMOS 0.18?m
description In the submicron technologies, RF noise isolation is becoming increasingly important. In this paper, the investigations of the on-chip RF isolation techniques were carried out. The chosen isolation structures were the Deep Nwell (or triple well isolation) and the P+ Guard Ring. The test structures were designed and fabricated using Silterra CMOS 0.18?m Mixed Signal process. The design parameter investigated was the distance between the isolation ring and the output terminal (Sout) in which the substrate coupling effects with and without deep nwell were characterized. � 2004 IEEE.
author2 9942783300
author_facet 9942783300
Ishak I.S.
Keating R.A.
Chakrabarty C.K.
format Conference paper
author Ishak I.S.
Keating R.A.
Chakrabarty C.K.
author_sort Ishak I.S.
title RF substrate noise characterization for CMOS 0.18?m
title_short RF substrate noise characterization for CMOS 0.18?m
title_full RF substrate noise characterization for CMOS 0.18?m
title_fullStr RF substrate noise characterization for CMOS 0.18?m
title_full_unstemmed RF substrate noise characterization for CMOS 0.18?m
title_sort rf substrate noise characterization for cmos 0.18?m
publishDate 2023
_version_ 1806425709040631808
score 13.188404