Application of Taguchi method in the optimization of process variation for 32nm CMOS technology

In this paper, we investigate the effect of four process parameters namely HALO implantation, compensation implantations, SiO2 thickness and silicide annealing time on threshold voltage (VTH) in complementary metal oxide semiconductor (CMOS) technology. The setting of process parameters were determi...

Full description

Saved in:
Bibliographic Details
Main Authors: Elgomati H.A., Majlis B.Y., Ahmad I., Salehuddin F., Hamid F.A., Zaharim A., Apte P.R.
Other Authors: 36536722700
Format: Article
Published: 2023
Subjects:
Tags: Add Tag
No Tags, Be the first to tag this record!
Be the first to leave a comment!
You must be logged in first