Design and optimization of 22nm NMOS transistor

• Main Authors: Afifah Maheran A.H., Menon P.S., Ahmad I., Shaari S., Elgomati H.A., Majlis B.Y., Salehuddin F.
• Other Authors: 36570222300
• Format: Article
• Published: 2023
• Subjects: 22nm NMOS; ANOVA; Orthogonal array; Taguchi method; Threshold voltage

In this paper, we investigate the effects of four process parameters and two process noise parameters on the threshold voltage (V th) of a 22nm NMOS transistor. We used TiO 2 as the high-k material to replace the SiO 2 dielectric. The NMOS transistor was simulated using the fabrication tool ATHENA a...