Optimization of process parameter variation in 45nm p-channel MOSFET using L18 orthogonal array

• Main Authors: Salehuddin F., Ahmad I., Hamid F.A., Zaharim A., Hamid A.M.A., Menon P.S., Elgomati H.A., Majlis B.Y., Apte P.R.
• Other Authors: 36239165300
• Format: Conference paper
• Published: 2023
• Subjects: Leakage Current; NMOS Device; Taguchi Method; Threshold Voltage; Electron beam lithography; Experiments; Leakage currents; Optimization; Simulators; Taguchi methods; Threshold voltage; 3 levels; Adjustment factors; Control factors; Device simulators; Major factors; MOS-FET; NMOS devices; Noise factor; Nominal values; Optimization of process parameters; Orthogonal array; P channels; Performance characteristics; pMOS devices; Process parameters; Process simulators; Signal to noise (S/N) ratios; MOSFET devices

In this study, orthogonal array of L18 in Taguchi method was used to optimize the process parameters variance on threshold voltage (V TH) in 45nm p-channel Metal Oxide Semiconductor Field Effect Transistor (MOSFET) device. The signal-to-noise (S/N) ratio and analysis of variance (ANOVA) are employed...