Gate Oxide Integrity (GOI) Characterization For Deep Submicron CMOS Device

Since the early days of Very Large Scale Integration (VLSI) era, the scaling of gate oxide thickness has been instrumental in controlling the short channel related effects in state-of-the-art device structure, as MOS gate dimensions have been scaled-down dramatically to a present day size of sub-0....

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主要作者: Norain Mohd Saad
其他作者: Ramzan Mat Ayub (Advisor)
格式: Learning Object
語言:English
出版: Universiti Malaysia Perlis 2008
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在線閱讀:http://dspace.unimap.edu.my/xmlui/handle/123456789/1275
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spelling my.unimap-12752008-06-10T03:28:25Z Gate Oxide Integrity (GOI) Characterization For Deep Submicron CMOS Device Norain Mohd Saad Ramzan Mat Ayub (Advisor) Time Dependent Dielectric Metal oxide semiconductors Very Large Scale Integration (VLSI) MOS capasitor Silica Gate Oxide Integrity (GOI) Since the early days of Very Large Scale Integration (VLSI) era, the scaling of gate oxide thickness has been instrumental in controlling the short channel related effects in state-of-the-art device structure, as MOS gate dimensions have been scaled-down dramatically to a present day size of sub-0.1um channel length. This project studied the relationship between the gate oxide breakdowns phenomena with short channel related effects. Special attention was given to the carrier injections related oxide degradation which is Fowler-Nordheim (F-N) Tunneling, since this phenomenon was becoming profoundly important in ultra-thin gate oxide thickness. Standard gate oxide breakdown characterizations such as V-ramp test and substrate current measurement have been performed on MOS capacitor test structure of different sizes. Holes generation and trap mechanism is found to be one of the main cause for the intrinsic gate oxide breakdown. Other mechanism such as Wolter’s electron lattice damage might also be of a possible candidate, however further characterization such as Time Dependent Dielectric Breakdown (TDDB) Test is required to establish the relationship. 2008-06-10T03:28:24Z 2008-06-10T03:28:24Z 2007-03 Learning Object http://hdl.handle.net/123456789/1275 en Universiti Malaysia Perlis School of Microelectronic Engineering
institution Universiti Malaysia Perlis
building UniMAP Library
collection Institutional Repository
continent Asia
country Malaysia
content_provider Universiti Malaysia Perlis
content_source UniMAP Library Digital Repository
url_provider http://dspace.unimap.edu.my/
language English
topic Time Dependent Dielectric
Metal oxide semiconductors
Very Large Scale Integration (VLSI)
MOS capasitor
Silica
Gate Oxide Integrity (GOI)
spellingShingle Time Dependent Dielectric
Metal oxide semiconductors
Very Large Scale Integration (VLSI)
MOS capasitor
Silica
Gate Oxide Integrity (GOI)
Norain Mohd Saad
Gate Oxide Integrity (GOI) Characterization For Deep Submicron CMOS Device
description Since the early days of Very Large Scale Integration (VLSI) era, the scaling of gate oxide thickness has been instrumental in controlling the short channel related effects in state-of-the-art device structure, as MOS gate dimensions have been scaled-down dramatically to a present day size of sub-0.1um channel length. This project studied the relationship between the gate oxide breakdowns phenomena with short channel related effects. Special attention was given to the carrier injections related oxide degradation which is Fowler-Nordheim (F-N) Tunneling, since this phenomenon was becoming profoundly important in ultra-thin gate oxide thickness. Standard gate oxide breakdown characterizations such as V-ramp test and substrate current measurement have been performed on MOS capacitor test structure of different sizes. Holes generation and trap mechanism is found to be one of the main cause for the intrinsic gate oxide breakdown. Other mechanism such as Wolter’s electron lattice damage might also be of a possible candidate, however further characterization such as Time Dependent Dielectric Breakdown (TDDB) Test is required to establish the relationship.
author2 Ramzan Mat Ayub (Advisor)
author_facet Ramzan Mat Ayub (Advisor)
Norain Mohd Saad
format Learning Object
author Norain Mohd Saad
author_sort Norain Mohd Saad
title Gate Oxide Integrity (GOI) Characterization For Deep Submicron CMOS Device
title_short Gate Oxide Integrity (GOI) Characterization For Deep Submicron CMOS Device
title_full Gate Oxide Integrity (GOI) Characterization For Deep Submicron CMOS Device
title_fullStr Gate Oxide Integrity (GOI) Characterization For Deep Submicron CMOS Device
title_full_unstemmed Gate Oxide Integrity (GOI) Characterization For Deep Submicron CMOS Device
title_sort gate oxide integrity (goi) characterization for deep submicron cmos device
publisher Universiti Malaysia Perlis
publishDate 2008
url http://dspace.unimap.edu.my/xmlui/handle/123456789/1275
_version_ 1643787224457674752
score 13.251813