Design and characterisation of ultra-low-power SOI-CMOS IC temperature level detector
Described are the design and characterisation of an ultra-low-power temperature level detector (TLD) and temperature sensor based on a silicon-on-insulator (SOI) CMOS integrated circuit (IC) for harsh environment applications. Since this IC is mainly for harsh environment applications (e.g. high tem...
Saved in:
| Main Authors: | , , , , |
|---|---|
| Format: | Citation Index Journal |
| Published: |
2012
|
| Subjects: | |
| Online Access: | http://eprints.utp.edu.my/9000/1/stamp.jsp_tp%3D%26arnumber%3D6235155%26tag%3D1 http://eprints.utp.edu.my/9000/ |
| Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
| Summary: | Described are the design and characterisation of an ultra-low-power temperature level detector (TLD) and temperature sensor based on a silicon-on-insulator (SOI) CMOS integrated circuit (IC) for harsh environment applications. Since this IC is mainly for harsh environment applications (e.g. high temperatures and radiations), it has been designed and manufactured using the 1 μm high-temperature SOI-CMOS technology provided by X-FAB. The measured power dissipation of the TLD circuit is 9 mW at a supply voltage of 5 V and temperature of 27 °C, according to the measurement results of the manufactured design. |
|---|