False path identification algorithm framework for nonseparable controller-data path circuits
In order to achieve the less test generation complexity, design-for-testability (DFT) techniques are used which causes untestable paths to be testable. These testable path delays have no effect on circuit performance are called false paths. It has been contended that such false paths should not be d...
Saved in:
| Main Authors: | , , |
|---|---|
| Format: | Article |
| Published: |
Institute of Electrical and Electronics Engineers Inc.
2017
|
| Online Access: | https://www.scopus.com/inward/record.uri?eid=2-s2.0-85011990404&doi=10.1109%2fICIAS.2016.7824116&partnerID=40&md5=5536af025b78972519f54f88bc6b6b58 http://eprints.utp.edu.my/20169/ |
| Tags: |
Add Tag
No Tags, Be the first to tag this record!
|