Cover Image

Using altera de1-soc: integrating hard processor system (hps) and field programmable gate array (fpga) cores for median filter

Saved in:

Bibliographic Details
Main Author:	Izam Kamisian, Syed Ahmad Asyraf Syed Mustafa
Format:	Article
Published:	2018
Online Access:	http://eprints.utm.my/id/eprint/83773/
Tags:	Add Tag No Tags, Be the first to tag this record!

Similar Items

QYPS HPS Interconnect verification methodology for SOC FPGA
by: Loh , Tat Jen
Published: (2013)

USB soft core with altera Nios processor
by: Cheah, Chee Teong
Published: (2007)

Hardware And Software Implementation Of Artificial Neural Network In Altera De1-Soc
by: Lim, Chun Ming
Published: (2017)

Design and implementation of 16 bit DSP core processor using field programmable gate array (FPGA)
by: Abdul Rahman, Abdul Aziz
Published: (2003)

Development FPGA VGA Using Altera De2 Board
by: Nur Syakhira bt Roslan
Published: (2013)

Automated vehicle navigation system for various application using nios processor and altera FPGA
by: Abdullah, Rahimah
Published: (2006)

PRINCE IP-core on Field Programmable Gate Arrays (FPGA)
by: Abbas Y.A., et al.
Published: (2023)

Design of an advanced encryption standard crypto-processor core for field programmable gate array implementation
by: Ismail, Mohd. Izuan
Published: (2006)

Implementation of a soft core processor on a FPGA
by: Woo, Chi Liang
Published: (2011)

Design of a route lookup processor for implementation in a FPGA-based system-on chip (SoC)
by: Teh , J-Wing
Published: (2004)

Instruction set simulator development for altera NIOS 2 processor
by: Teh, Fu Sun Ivan
Published: (2008)

An FPGA implementation of RSA processor core for public-key cryptosystem
by: Tan, Siang Lin
Published: (2001)

Implementation of direct torque control of induction machines utilizing Digital Signal Processor (DSP) and Field Programmable Gate Arrays (FPGA)
by: Toh, Chuen Ling
Published: (2005)

Real-time FPGA implementation of baseline JPEG codec processor core
by: Suleiman, Ishak
Published: (2002)

Verilog design of bist on AES256 processor core with FPGA implementation
by: Hew, Kean Yung
Published: (2008)

Thumbprint preprocessing using altera cyclone DE2 board
by: Nam, Kok Wai
Published: (2009)

VHDL design of A 32-Bit RISC processor core for FPGA implementation
by: Marsono, Muhammad Nadzir
Published: (2001)

An AES tightly coupled hardware accelerator in an FPGA-based Embedded processor core
by: Hani, Mohamed Khalil, et al.
Published: (2009)

Educational ate based on fpga
by: Izam Kamisian, Wong Chun Hou
Published: (2018)

UKM8032 microcontroller design and FPGA implementation by integrating DW8051 IP Core for SoC design
by: Chong, Victer, et al.
Published: (2004)

32-bit NxN matrix multiplication: performance evaluation for altera FPGA, i5 Clarkdale, and atom pineview-D intel general purpose processors
by: Mohamed, Izzeldin Ibrahim, et al.
Published: (2012)

Neuro-Fuzzy Algorithm Implemented In Altera’s FPGA For Mobile Robot’s Obstacle Avoidance Mission.
by: Mahyuddin, Muhammad Nasiruddin, et al.
Published: (2009)

FPGA prototyping of universal asynchronous receiver-transmitter (UART) using altera VHDL implementation
by: Ahmad, Nabihah @ Nornabihah
Published: (2005)

FPGA prototyping of universal asynchronous receiver-transmitter (UART) using altera VHDL implementation
by: Ahmad, Nabihah @ Nornabihah
Published: (2005)

Fast fourier transform processor implementation for high inputs on field programmable gates array
by: Ali Abbas, Zaid
Published: (2018)

Measuring quality of fingerprint image using altera cyclone DE2 board
by: Kwan, Ee Lun
Published: (2009)

FBGA-based implementation of electronic abacus using altera DE2 board
by: Sidek, Azmi
Published: (2017)

Implementation of image compression algorithm using field programmable gate array (FPGA)
by: Aspar, Zulfakar
Published: (1999)

Design and implementation of real data fast fourier transform processor on field programmable gates array
by: Ahmed, Mohammed Kassim
Published: (2015)

Implementation of a New Torque and Flux Controllers for Direct Torque Control (DTC) of Induction Machine Utilizing Digital Signal Processor (DSP) and Field Programmable Gate Arrays (FPGA)
by: Toh, C. L., et al.
Published: (2005)

Field programmable gate array (FPGA) based fuzzy logic controller for boost converter
by: Md. Ayob, Shahrin
Published: (2011)

Studies on flat CORDIC implementation in field programmable gate arrays (FPGA) / Meera Subramaniam
by: Meera , Subramaniam
Published: (2004)

Field Programmable Gate Array (FPGA)-based Intelligent Management System for Home Appliances
by: Maimun, Huja Husin, et al.
Published: (2011)

Optimization of FPGA Based Neural Network Processor
by: Sun, Ivan Teh Fu
Published: (2004)

Design and modeling of linear back projection (lbp) algorithm for field programmable gate array (FPGA)
by: Podari, N., et al.
Published: (2016)

Technique Of Pvt Analysis On Sd Controller Timing Validation For 28nm Soc Fpga
by: Yusni, Nur Amalina Aiza
Published: (2015)

Design and implementation of embedded vision-based tracking system using FPGA-SoC
by: Saif Najim, Ismail
Published: (2017)

Altera To Share Expertise With Varsities
by: The Star, Jo Timbuong
Published: (2008)

Low power pipelined FFT processor architecture on FPGA
by: Mohd Hassan, Siti Lailatul, et al.
Published: (2018)

Performance comparison of NxN matrix multiplication between field programmable gate array and general purpose processor
by: Chay, Chin Fatt
Published: (2012)