Low cost pipelined FPGA architecture of Harris Corner Detector for real-time applications

• Main Authors: Orabi, H., Shaikh-Husin, N., Sheikh, U. U.
• Format: Conference or Workshop Item
• Published: Institute of Electrical and Electronics Engineers Inc. 2016
• Subjects: TK Electrical engineering. Electronics Nuclear engineering
• Online Access: http://eprints.utm.my/id/eprint/73462/; https://www.scopus.com/inward/record.uri?eid=2-s2.0-84964801925&doi=10.1109%2fICDIM.2015.7381868&partnerID=40&md5=c237a35e9b65102fbbe8cae6309865a5

In this paper, we present a low cost, pipelined FPGA architecture of a Harris Corner Detector. The platform is Altera Cyclone IV on a DE2-115 development board. The pipeline is composed of multiple stages, between which data flows without temporary full-frame buffering. The architecture was tested u...