Thermal model with metal consideration for System-On-Chip testing
Increasing switching activities leads to high temperature during testing, which has adverse impact on circuit performance and reliability. Therefore, simulating thermal effects on System-on-Chip (SoC) when performing test scheduling is essential. However, most of the previous works on temperatureawa...
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| Main Authors: | , |
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| Format: | Article |
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American Scientific Publishers
2014
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| Subjects: | |
| Online Access: | http://eprints.utm.my/id/eprint/63055/ http://dx.doi.org/10.1166/jolpe.2014.1330 |
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