Device and circuit modeling of nano-cmos
The demand for more and ever smaller portable electronic devices has driven metal oxide semiconductor-based (CMOS) technology to its physical limit with the smallest possible feature sizes. This presents various size-related problems such as high power leakage, low-reliability, and thermal effects,...
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2012
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my.utm.477602017-08-13T05:02:46Z http://eprints.utm.my/id/eprint/47760/ Device and circuit modeling of nano-cmos Abd. Aziz, Mohd. Farid Chek, Desmond Chang Yih Arora, Vijay K. TA Engineering (General). Civil engineering (General) The demand for more and ever smaller portable electronic devices has driven metal oxide semiconductor-based (CMOS) technology to its physical limit with the smallest possible feature sizes. This presents various size-related problems such as high power leakage, low-reliability, and thermal effects, and is a limit on further miniaturisation. To enable even smaller electronics, various nano-devices including carbon nanotube transistors, graphene transistors, tunnel transistors and memristors (collectively called post-CMOS devices) are emerging that could replace the traditional and ubiquitous silicon transistor. Over two volumes this work describes the modelling, design, and implementation of nano-scaled CMOS electronics, and the new generation of post-CMOS devices, at both the device and circuit levels. Penerbit UTM 2012 Book Section PeerReviewed Abd. Aziz, Mohd. Farid and Chek, Desmond Chang Yih and Arora, Vijay K. (2012) Device and circuit modeling of nano-cmos. In: Computational Nanotechnology: Modeling and Applications With MATLAB. Penerbit UTM, Skudai, Johor, pp. 21-29. ISBN 978-967-354-189-8 |
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TA Engineering (General). Civil engineering (General) Abd. Aziz, Mohd. Farid Chek, Desmond Chang Yih Arora, Vijay K. Device and circuit modeling of nano-cmos |
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The demand for more and ever smaller portable electronic devices has driven metal oxide semiconductor-based (CMOS) technology to its physical limit with the smallest possible feature sizes. This presents various size-related problems such as high power leakage, low-reliability, and thermal effects, and is a limit on further miniaturisation. To enable even smaller electronics, various nano-devices including carbon nanotube transistors, graphene transistors, tunnel transistors and memristors (collectively called post-CMOS devices) are emerging that could replace the traditional and ubiquitous silicon transistor. Over two volumes this work describes the modelling, design, and implementation of nano-scaled CMOS electronics, and the new generation of post-CMOS devices, at both the device and circuit levels. |
format |
Book Section |
author |
Abd. Aziz, Mohd. Farid Chek, Desmond Chang Yih Arora, Vijay K. |
author_facet |
Abd. Aziz, Mohd. Farid Chek, Desmond Chang Yih Arora, Vijay K. |
author_sort |
Abd. Aziz, Mohd. Farid |
title |
Device and circuit modeling of nano-cmos |
title_short |
Device and circuit modeling of nano-cmos |
title_full |
Device and circuit modeling of nano-cmos |
title_fullStr |
Device and circuit modeling of nano-cmos |
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Device and circuit modeling of nano-cmos |
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device and circuit modeling of nano-cmos |
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Penerbit UTM |
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2012 |
url |
http://eprints.utm.my/id/eprint/47760/ |
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1643652362886184960 |
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13.188404 |