Detecting Resistive-Opens in RRAM using Programmable DfT Scheme
Resistive Random Access Memory (RRAM) is one of the emerging memory devices that possesses a combined attribute of SRAM, DRAM and flash. How- ever, as the technology and fabrication process of such a promising memory devices are still immature, RRAM is expected to be impacted by process-variati...
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| Main Authors: | , , |
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| Format: | Conference or Workshop Item |
| Language: | English |
| Published: |
2013
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| Subjects: | |
| Online Access: | http://eprints.utem.edu.my/id/eprint/10106/1/ASQED13.pdf http://eprints.utem.edu.my/id/eprint/10106/ |
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| Summary: | Resistive Random Access Memory (RRAM)
is one of the emerging memory devices that possesses a
combined attribute of SRAM, DRAM and flash. How-
ever, as the technology and fabrication process of such a
promising memory devices are still immature, RRAM is
expected to be impacted by process-variation faults such
as resistive-open. This kind of defect is difficult to be detected using existing Design-for-Testability (DfT) scheme,
which is developed based on a single critical defect value.
This paper presents a new DfT scheme with the capability
to identify faulty RRAM cells impacted by resistive-opens
due to process variation. The new DfT scheme, referred
to as Programmable Low Write Voltage (PLWV), is based
on multiple voltage levels that can be programmed to suit
the target fault coverage. The concept, design methodology and circuit are described. SPICE simulation results
suggest that the proposed PLWV scheme can detect faults
with different defect values at minimal circuit modification. |
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