Effect of process parameter variations on threshold voltage in 45nm NMOS device

Taguchi method was used to optimize of the effect process parameter variations on threshold voltage in 45nm NMOS device. In this paper, there are four process parameters (factors) were used, which are Halo Implantation, Source/Drain (S/D) Implantation, Oxide Growth Temperature and Silicide Anneal te...

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Main Authors: Salehuddin, F., Ahmad, I., Hamid, F.A., Zaharim, A.
Format: Conference Proceeding
Published: 2017
Online Access:http://dspace.uniten.edu.my:80/jspui/handle/123456789/5245
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spelling my.uniten.dspace-52452018-03-02T03:33:40Z Effect of process parameter variations on threshold voltage in 45nm NMOS device Salehuddin, F. Ahmad, I. Hamid, F.A. Zaharim, A. Taguchi method was used to optimize of the effect process parameter variations on threshold voltage in 45nm NMOS device. In this paper, there are four process parameters (factors) were used, which are Halo Implantation, Source/Drain (S/D) Implantation, Oxide Growth Temperature and Silicide Anneal temperature. The virtual fabrication of the devices was performed by using ATHENA module. While the electrical characterization of the devices was implemented by using ATLAS module. These two modules were combined with Taguchi method to aid in design and optimizer the process parameters. Threshold voltage (VTH) results were used as the evaluation variables. The results were then subjected to the Taguchi method to determine the optimal process parameters and to produce predicted values. The predicted values of the process parameters were then successfully verified with ATHENA and ATLAS's simulator. In this research, oxide growth temperature was identified as one of the process parameters that has the strongest effect on the response characteristics. While the S/D Implantation was identified as adjustment factor to get the nominal values of threshold voltage for NMOS device equal to 0.15V. ©2010 IEEE. 2017-11-15T02:57:00Z 2017-11-15T02:57:00Z 2010 Conference Proceeding http://dspace.uniten.edu.my:80/jspui/handle/123456789/5245 10.1109/SCORED.2010.5704034
institution Universiti Tenaga Nasional
building UNITEN Library
collection Institutional Repository
continent Asia
country Malaysia
content_provider Universiti Tenaga Nasional
content_source UNITEN Institutional Repository
url_provider http://dspace.uniten.edu.my/
description Taguchi method was used to optimize of the effect process parameter variations on threshold voltage in 45nm NMOS device. In this paper, there are four process parameters (factors) were used, which are Halo Implantation, Source/Drain (S/D) Implantation, Oxide Growth Temperature and Silicide Anneal temperature. The virtual fabrication of the devices was performed by using ATHENA module. While the electrical characterization of the devices was implemented by using ATLAS module. These two modules were combined with Taguchi method to aid in design and optimizer the process parameters. Threshold voltage (VTH) results were used as the evaluation variables. The results were then subjected to the Taguchi method to determine the optimal process parameters and to produce predicted values. The predicted values of the process parameters were then successfully verified with ATHENA and ATLAS's simulator. In this research, oxide growth temperature was identified as one of the process parameters that has the strongest effect on the response characteristics. While the S/D Implantation was identified as adjustment factor to get the nominal values of threshold voltage for NMOS device equal to 0.15V. ©2010 IEEE.
format Conference Proceeding
author Salehuddin, F.
Ahmad, I.
Hamid, F.A.
Zaharim, A.
spellingShingle Salehuddin, F.
Ahmad, I.
Hamid, F.A.
Zaharim, A.
Effect of process parameter variations on threshold voltage in 45nm NMOS device
author_facet Salehuddin, F.
Ahmad, I.
Hamid, F.A.
Zaharim, A.
author_sort Salehuddin, F.
title Effect of process parameter variations on threshold voltage in 45nm NMOS device
title_short Effect of process parameter variations on threshold voltage in 45nm NMOS device
title_full Effect of process parameter variations on threshold voltage in 45nm NMOS device
title_fullStr Effect of process parameter variations on threshold voltage in 45nm NMOS device
title_full_unstemmed Effect of process parameter variations on threshold voltage in 45nm NMOS device
title_sort effect of process parameter variations on threshold voltage in 45nm nmos device
publishDate 2017
url http://dspace.uniten.edu.my:80/jspui/handle/123456789/5245
_version_ 1644493626677395456
score 13.214268