Performance Analysis in Mesh Network-on-Chip Topology by using Multilevel Network Partitioning

• 主要な著者: Asrani, Lit, M. Q., Edanan, H. H. A., Halim, Fariza, Mahyan, Termimi Hidayat, Mahyan
• フォーマット: Proceeding
• 言語: English
• 出版事項: 2015
• 主題: QA75 Electronic computers. Computer science
• オンライン･アクセス: http://ir.unimas.my/id/eprint/41644/3/Performance%20Analysis.pdf; http://ir.unimas.my/id/eprint/41644/

The increasing complexity of System-on-Chips (SoCs) has resulted in the bottlenecking of the system due to scalability problems in the bus system. This leads to the decrement of the performance of future SoCs with more complex circuitries inside them. Network-on-Chips (NoCs) was proposed as one of t...