SOFT ERROR IN ASYNCHRONOUS CIRCUIT DESIGN
Soft error considers as a serious concern in state holders as it can cause the circuit to malfunction temporarily. Soft errors are categorised as Single Event Upset (SEU) and Single Event Transient (SET). Radiation actuate soft errors are often happen to most of the electronic products especially wi...
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| Main Author: | |
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| Format: | Final Year Project Report |
| Language: | English English |
| Published: |
Universiti Malaysia Sarawak, (UNIMAS)
2019
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| Online Access: | http://ir.unimas.my/id/eprint/34348/1/SOFT%20ERROR%20IN%20ASYNCHRONOUS%20CIRCUIT%20DESIGN24pgs.pdf http://ir.unimas.my/id/eprint/34348/4/SOFT%20ERROR%20IN%20ASYNCHRONOUS%20CIRCUIT%20DESIGNft.pdf http://ir.unimas.my/id/eprint/34348/ |
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| Summary: | Soft error considers as a serious concern in state holders as it can cause the circuit to malfunction temporarily. Soft errors are categorised as Single Event Upset (SEU) and Single Event Transient (SET). Radiation actuate soft errors are often happen to most of the electronic products especially with the CMOS technology development. A particle striking on any of the electronic products that can produce soft errors that can be either single event upset or single event transient. Soft errors are not reproducible, and it corrupt the data integrity of the system. This project presents several nodes that are injected with the soft error in the asynchronous circuit. An asynchronous circuit was design using the dual rail encoding and 3-6 code converter while the soft error is represented by using XOR logic gate. The effect of the soft error to the asynchronous circuit is it changed the stored data and it produce errors on the waveform which mean the output parameters are not the same as output parameters. In the project, the presence and absence of error are analysed by observing the output parameter of the waveform that are produced. The software is used to design entry, synthesize the design, compile the schematic diagram, stimulate the gate level schematic of the asynchronous circuit as well as the addition of soft error in the circuit. Moreover, logic gates are commonly used to design the C-element in the software used. The software used to complete the project is Quartus ii Prime Lite edition software. |
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