Coherent effect on LOCOS and STI technique for 0.18 µm CMOS technology using Taurus Workbench

• 主要作者: Wan Shafie Wan Sulaiman
• 其他作者: Ruslinda A. Rahim (Advisor)
• 格式: Learning Object
• 语言: English
• 出版: Universiti Malaysia Perlis 2008
• 主题: Integrated circuits > Very large scale integration; Local oxidation of silicon (LOCOS); Shallow Trench Isolation (STI); Transistors; CMOS transistors; Metal oxide semiconductors, Complementary; Integrated circuits
• 在线阅读: http://dspace.unimap.edu.my/xmlui/handle/123456789/1955

LOCOS (Local Oxidation of Silicon) and STI (Shallow Trench Isolation) are two isolation techniques used in integrated circuit fabrication. Further device scaling using LOCOS technique is no longer practical for technology generations below 0.35 µm. STI technique was thus introduced because of its...