Coherent effect on LOCOS and STI technique for 0.18 µm CMOS technology using Taurus Workbench

LOCOS (Local Oxidation of Silicon) and STI (Shallow Trench Isolation) are two isolation techniques used in integrated circuit fabrication. Further device scaling using LOCOS technique is no longer practical for technology generations below 0.35 µm. STI technique was thus introduced because of its...

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Bibliographic Details
Main Author: Wan Shafie Wan Sulaiman
Other Authors: Ruslinda A. Rahim (Advisor)
Format: Learning Object
Language:English
Published: Universiti Malaysia Perlis 2008
Subjects:
Online Access:http://dspace.unimap.edu.my/xmlui/handle/123456789/1955
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