Simulation on Effects of Different Types of Channel/Drain Engineering Structure on MOS Device Performance
This final year project is aimed to analyze the effects of three different types of channel/drain engineering structure on MOS transistor performance. As a project basis, a 0.35μm process recipe from UC Berkeley is used as reference. To proceed it, the other parameters need to be retained and only t...
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Format: | Learning Object |
Language: | English |
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Universiti Malaysia Perlis
2008
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Online Access: | http://dspace.unimap.edu.my/xmlui/handle/123456789/1338 |
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