A VHDL implementation of BIST technique in UART design / by Mohd. Yamani Idna bin Idris.

• Main Author: Idris, Mohd. Yamani Idna
• Format: Thesis
• Published: 2002
• Subjects: QA Mathematics
• Online Access: http://studentsrepo.um.edu.my/2150/1/PENDAHULUAN.pdf; http://studentsrepo.um.edu.my/2150/2/KANDUNGAN.pdf; http://studentsrepo.um.edu.my/2150/3/BAB_1.pdf; http://studentsrepo.um.edu.my/2150/4/BAB_2.pdf; http://studentsrepo.um.edu.my/2150/5/BAB_3.pdf; http://studentsrepo.um.edu.my/2150/6/BAB_4.pdf; http://studentsrepo.um.edu.my/2150/7/BAB_5.pdf; http://studentsrepo.um.edu.my/2150/8/BAB_6.pdf; http://studentsrepo.um.edu.my/2150/9/BAB_7.pdf; http://studentsrepo.um.edu.my/2150/10/LAMPIRAN.pdf; http://studentsrepo.um.edu.my/2150/11/BIBLIOGRAFI.pdf; http://www.pendeta.um.edu.my/uhtbin/cgisirsi/x/P01UTAMA/0/5?searchdata1="A VHDL implementation of BIST technique in UART design"{245}; http://studentsrepo.um.edu.my/2150/