Fuzzy Logic design using VHDL on FPGA
This fuzzy logic design is to produce 3 outputs from a 7 input. The 7 digital input (3-bits each) is produced from the analogue output of the 7-input honeycomb sensor. The honeycomb sensor receives input from seven sensors which sense light ambient and produces analogue signal to acknowledge the loc...
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Format: | Learning Object |
Language: | English |
Published: |
Universiti Malaysia Perlis
2008
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Online Access: | http://dspace.unimap.edu.my/xmlui/handle/123456789/3120 |
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