Nanoscale patterning by AFM lithography and its application on the fabrication of silicon nanowire devices

Many techniques have been applied to fabricate nanostructures via top-down approach such as electron beam lithography. However, most of the techniques are very complicated and involves many process steps, high cost operation as well as the use of hazardous chemicals. Meanwhile, atomic force microsco...

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Main Authors: Sabar D. Hutagalung,, Kam, Chung Lew, Darsono, Teguh
Format: Article
Language:English
Published: Universiti Kebangsaan Malaysia 2014
Online Access:http://journalarticle.ukm.my/6857/1/15_Sabar_D._Hutagalung.pdf
http://journalarticle.ukm.my/6857/
http://www.ukm.my/jsm
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spelling my-ukm.journal.68572016-12-14T06:42:23Z http://journalarticle.ukm.my/6857/ Nanoscale patterning by AFM lithography and its application on the fabrication of silicon nanowire devices Sabar D. Hutagalung, Kam, Chung Lew Darsono, Teguh Many techniques have been applied to fabricate nanostructures via top-down approach such as electron beam lithography. However, most of the techniques are very complicated and involves many process steps, high cost operation as well as the use of hazardous chemicals. Meanwhile, atomic force microscopy (AFM) lithography is a simple technique which is considered maskless and involves only an average cost and less complexity. In AFM lithography, the movement of a probe tip can be controlled to create nanoscale patterns on sample surface. For silicon nanowire (SiNW) fabrication, a conductive tip was operated in non-contact AFM mode to grow nanoscale oxide patterns on silicon-on-insulator (SOI) wafer surface based on local anodic oxidation (LAO) mechanism. The patterned structure was etched through two steps of wet etching processes. First, the TMAH was used as the etchant solution for Si removing. In the second step, diluted HF was used to remove oxide mask in order to produce a completed SiNW based devices. A SiNW based device which is formed by a nanowire channel, source and drain pads with lateral gate structures can be fabricated by well controlling the lithography process (applied tip voltage and writing speed) as well as the etching processes. Universiti Kebangsaan Malaysia 2014-02 Article PeerReviewed application/pdf en http://journalarticle.ukm.my/6857/1/15_Sabar_D._Hutagalung.pdf Sabar D. Hutagalung, and Kam, Chung Lew and Darsono, Teguh (2014) Nanoscale patterning by AFM lithography and its application on the fabrication of silicon nanowire devices. Sains Malaysiana, 43 (2). pp. 267-272. ISSN 0126-6039 http://www.ukm.my/jsm
institution Universiti Kebangsaan Malaysia
building Perpustakaan Tun Sri Lanang Library
collection Institutional Repository
continent Asia
country Malaysia
content_provider Universiti Kebangsaan Malaysia
content_source UKM Journal Article Repository
url_provider http://journalarticle.ukm.my/
language English
description Many techniques have been applied to fabricate nanostructures via top-down approach such as electron beam lithography. However, most of the techniques are very complicated and involves many process steps, high cost operation as well as the use of hazardous chemicals. Meanwhile, atomic force microscopy (AFM) lithography is a simple technique which is considered maskless and involves only an average cost and less complexity. In AFM lithography, the movement of a probe tip can be controlled to create nanoscale patterns on sample surface. For silicon nanowire (SiNW) fabrication, a conductive tip was operated in non-contact AFM mode to grow nanoscale oxide patterns on silicon-on-insulator (SOI) wafer surface based on local anodic oxidation (LAO) mechanism. The patterned structure was etched through two steps of wet etching processes. First, the TMAH was used as the etchant solution for Si removing. In the second step, diluted HF was used to remove oxide mask in order to produce a completed SiNW based devices. A SiNW based device which is formed by a nanowire channel, source and drain pads with lateral gate structures can be fabricated by well controlling the lithography process (applied tip voltage and writing speed) as well as the etching processes.
format Article
author Sabar D. Hutagalung,
Kam, Chung Lew
Darsono, Teguh
spellingShingle Sabar D. Hutagalung,
Kam, Chung Lew
Darsono, Teguh
Nanoscale patterning by AFM lithography and its application on the fabrication of silicon nanowire devices
author_facet Sabar D. Hutagalung,
Kam, Chung Lew
Darsono, Teguh
author_sort Sabar D. Hutagalung,
title Nanoscale patterning by AFM lithography and its application on the fabrication of silicon nanowire devices
title_short Nanoscale patterning by AFM lithography and its application on the fabrication of silicon nanowire devices
title_full Nanoscale patterning by AFM lithography and its application on the fabrication of silicon nanowire devices
title_fullStr Nanoscale patterning by AFM lithography and its application on the fabrication of silicon nanowire devices
title_full_unstemmed Nanoscale patterning by AFM lithography and its application on the fabrication of silicon nanowire devices
title_sort nanoscale patterning by afm lithography and its application on the fabrication of silicon nanowire devices
publisher Universiti Kebangsaan Malaysia
publishDate 2014
url http://journalarticle.ukm.my/6857/1/15_Sabar_D._Hutagalung.pdf
http://journalarticle.ukm.my/6857/
http://www.ukm.my/jsm
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score 13.160551