Determination of Worst Case Input Combinations of Nanoscale Circuits Using Bayesian Networks
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2012
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my.utp.eprints.97922013-04-07T03:46:53Z Determination of Worst Case Input Combinations of Nanoscale Circuits Using Bayesian Networks Narinderjit Singh A/L Sawaran Singh, Nor Hisham bin Hamid, Vijanth Sagayan A/L Asirvadam, 2012 Citation Index Journal NonPeerReviewed Narinderjit Singh A/L Sawaran Singh, and Nor Hisham bin Hamid, and Vijanth Sagayan A/L Asirvadam, (2012) Determination of Worst Case Input Combinations of Nanoscale Circuits Using Bayesian Networks. [Citation Index Journal] http://eprints.utp.edu.my/9792/ |
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Narinderjit Singh A/L Sawaran Singh, Nor Hisham bin Hamid, Vijanth Sagayan A/L Asirvadam, |
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Narinderjit Singh A/L Sawaran Singh, Nor Hisham bin Hamid, Vijanth Sagayan A/L Asirvadam, Determination of Worst Case Input Combinations of Nanoscale Circuits Using Bayesian Networks |
author_facet |
Narinderjit Singh A/L Sawaran Singh, Nor Hisham bin Hamid, Vijanth Sagayan A/L Asirvadam, |
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Narinderjit Singh A/L Sawaran Singh, |
title |
Determination of Worst Case Input Combinations of Nanoscale Circuits Using Bayesian Networks
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title_short |
Determination of Worst Case Input Combinations of Nanoscale Circuits Using Bayesian Networks
|
title_full |
Determination of Worst Case Input Combinations of Nanoscale Circuits Using Bayesian Networks
|
title_fullStr |
Determination of Worst Case Input Combinations of Nanoscale Circuits Using Bayesian Networks
|
title_full_unstemmed |
Determination of Worst Case Input Combinations of Nanoscale Circuits Using Bayesian Networks
|
title_sort |
determination of worst case input combinations of nanoscale circuits using bayesian networks |
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2012 |
url |
http://eprints.utp.edu.my/9792/ |
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1738655790767538176 |
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13.214268 |