High degree of testability using full scan chain and ATPG-An industrial perspective

This study describes an efficient design methodology from an industrial perspective on utilizing Register Transfer Level (RTL) coding style, full scan chain implementation and Automatic Test Pattern Generation (ATPG) to achieve a high percentage of testability in the final Integrated Circuit (IC). T...

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Bibliographic Details
Main Authors: M.B.I., Reaz, W.F., Lee, N.H., Hamid, H.H., Lo, A.Y.M., Shakaff
Format: Citation Index Journal
Published: 2009
Subjects:
Online Access:http://eprints.utp.edu.my/458/1/paper.pdf
http://www.scopus.com/inward/record.url?eid=2-s2.0-67649780535&partnerID=40&md5=d139c1efbcf4357b2da71050a3b397ed
http://eprints.utp.edu.my/458/
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