High Degree of Testability Using Full Scan Chain and ATPG: An Industrial Perspective

This study describes an efficient design methodology from an industrial perspective on utilizing Register Transfer Level (RTL) coding style, full scan chain implementation and Automatic Test Pattern Generation (ATPG) to achieve a high percentage of testability in the final Integrated Circuit (IC)....

Full description

Saved in:
Bibliographic Details
Main Authors: B. I. Reaz, Mamun, F. Lee, Weng, Hamid, Nor Hisham, Hai, H. Lo, Y. M. Shakaff, Ali
Format: Article
Published: 2009
Subjects:
Online Access:http://eprints.utp.edu.my/4132/
Tags: Add Tag
No Tags, Be the first to tag this record!