Core-Based Testing of Multiprocessor System-on-Chips Utilizing Hierarchical Functional Buses
An integrated test scheduling methodology for multiprocessor System-on-Chips (SOC) utilizing the functional buses for test data delivery is described. The proposed methodology handles both flat bus single processor SOC and hierarchical bus multiprocessor SOC. It is based on a resource graph manipula...
Saved in:
Main Authors: | , , , |
---|---|
格式: | Conference or Workshop Item |
出版: |
2007
|
主題: | |
在線閱讀: | http://eprints.utp.edu.my/3590/1/fawnizu_aspdac2008.pdf http://eprints.utp.edu.my/3590/ |
標簽: |
添加標簽
沒有標簽, 成為第一個標記此記錄!
|