FPGA-based hardware implementation of optical flow constraint equation of Horn and Schunck
In hardware implementation, there are different architectures that can represent the same algorithm into hardware. The different architectures are usually caused by using different number representations. In this work, two hardware architectures of optical flow constraint equation of Horn and Schunc...
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| Main Authors: | , , |
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| Format: | Conference or Workshop Item |
| Published: |
2012
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| Online Access: | http://eprints.utp.edu.my/11985/1/06306121.pdf http://eprints.utp.edu.my/11985/ |
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