DTAPO: Dynamic thermal-aware performance optimization for dark silicon many-core systems

Future many-core systems need to handle high power density and chip temperature effectively. Some cores in many-core systems need to be turned off or ‘dark’ to manage chip power and thermal density. This phenomenon is also known as the dark silicon problem. This problem prevents many-core systems fr...

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Main Authors: Mohammed, Mohammed Sultan, Al Kubati, Ali A. M., Paraman, Norlina, Ab. Rahman, Ab. Al Hadi, Marsono, M. N.
Format: Article
Language:English
Published: MDPI AG 2020
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Online Access:http://eprints.utm.my/id/eprint/90459/1/MuhammadNadzirMarsono2020_DTaPODynamicThermal-AwarePerformanceOptimization.pdf
http://eprints.utm.my/id/eprint/90459/
http://dx.doi.org/10.3390/electronics9111980
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spelling my.utm.904592021-04-30T14:41:48Z http://eprints.utm.my/id/eprint/90459/ DTAPO: Dynamic thermal-aware performance optimization for dark silicon many-core systems Mohammed, Mohammed Sultan Al Kubati, Ali A. M. Paraman, Norlina Ab. Rahman, Ab. Al Hadi Marsono, M. N. TK Electrical engineering. Electronics Nuclear engineering Future many-core systems need to handle high power density and chip temperature effectively. Some cores in many-core systems need to be turned off or ‘dark’ to manage chip power and thermal density. This phenomenon is also known as the dark silicon problem. This problem prevents many-core systems from utilizing and gaining improved performance from a large number of processing cores. This paper presents a dynamic thermal-aware performance optimization of dark silicon many-core systems (DTaPO) technique for optimizing dark silicon a many-core system performance under temperature constraint. The proposed technique utilizes both task migration and dynamic voltage frequency scaling (DVFS) for optimizing the performance of a many-core system while keeping system temperature in a safe operating limit. Task migration puts hot cores in low-power states and moves tasks to cooler dark cores to aggressively reduce chip temperature while maintaining high overall system performance. To reduce task migration overhead due to cold start, the source core (i.e., active core) keeps its L2 cache content during the initial migration phase. The destination core (i.e., dark core) can access it to reduce the impact of cold start misses. Moreover, the proposed technique limits tasks migration among cores that share the last level cache (LLC). In the case of major thermal violation and no cooler cores being available, DVFS is used to reduce the hot cores temperature gradually by reducing their frequency. Experimental results for different threshold temperatures show that DTaPO can keep the average system temperature below the thermal limit. Affirmatively, the execution time penalty is reduced by up to 18% compared with using only DVFS for all thermal thresholds. Moreover, the average peak temperature is reduced by up to 10.8◦ C. In addition, the experimental results show that DTaPO improves the system’s performance by up to 80% compared to optimal sprinting patterns (OSP) and reduces the temperature by up to 13.6◦ C. MDPI AG 2020-11 Article PeerReviewed application/pdf en http://eprints.utm.my/id/eprint/90459/1/MuhammadNadzirMarsono2020_DTaPODynamicThermal-AwarePerformanceOptimization.pdf Mohammed, Mohammed Sultan and Al Kubati, Ali A. M. and Paraman, Norlina and Ab. Rahman, Ab. Al Hadi and Marsono, M. N. (2020) DTAPO: Dynamic thermal-aware performance optimization for dark silicon many-core systems. Electronics (Switzerland), 9 (11). pp. 1-18. ISSN 2079-9292 http://dx.doi.org/10.3390/electronics9111980
institution Universiti Teknologi Malaysia
building UTM Library
collection Institutional Repository
continent Asia
country Malaysia
content_provider Universiti Teknologi Malaysia
content_source UTM Institutional Repository
url_provider http://eprints.utm.my/
language English
topic TK Electrical engineering. Electronics Nuclear engineering
spellingShingle TK Electrical engineering. Electronics Nuclear engineering
Mohammed, Mohammed Sultan
Al Kubati, Ali A. M.
Paraman, Norlina
Ab. Rahman, Ab. Al Hadi
Marsono, M. N.
DTAPO: Dynamic thermal-aware performance optimization for dark silicon many-core systems
description Future many-core systems need to handle high power density and chip temperature effectively. Some cores in many-core systems need to be turned off or ‘dark’ to manage chip power and thermal density. This phenomenon is also known as the dark silicon problem. This problem prevents many-core systems from utilizing and gaining improved performance from a large number of processing cores. This paper presents a dynamic thermal-aware performance optimization of dark silicon many-core systems (DTaPO) technique for optimizing dark silicon a many-core system performance under temperature constraint. The proposed technique utilizes both task migration and dynamic voltage frequency scaling (DVFS) for optimizing the performance of a many-core system while keeping system temperature in a safe operating limit. Task migration puts hot cores in low-power states and moves tasks to cooler dark cores to aggressively reduce chip temperature while maintaining high overall system performance. To reduce task migration overhead due to cold start, the source core (i.e., active core) keeps its L2 cache content during the initial migration phase. The destination core (i.e., dark core) can access it to reduce the impact of cold start misses. Moreover, the proposed technique limits tasks migration among cores that share the last level cache (LLC). In the case of major thermal violation and no cooler cores being available, DVFS is used to reduce the hot cores temperature gradually by reducing their frequency. Experimental results for different threshold temperatures show that DTaPO can keep the average system temperature below the thermal limit. Affirmatively, the execution time penalty is reduced by up to 18% compared with using only DVFS for all thermal thresholds. Moreover, the average peak temperature is reduced by up to 10.8◦ C. In addition, the experimental results show that DTaPO improves the system’s performance by up to 80% compared to optimal sprinting patterns (OSP) and reduces the temperature by up to 13.6◦ C.
format Article
author Mohammed, Mohammed Sultan
Al Kubati, Ali A. M.
Paraman, Norlina
Ab. Rahman, Ab. Al Hadi
Marsono, M. N.
author_facet Mohammed, Mohammed Sultan
Al Kubati, Ali A. M.
Paraman, Norlina
Ab. Rahman, Ab. Al Hadi
Marsono, M. N.
author_sort Mohammed, Mohammed Sultan
title DTAPO: Dynamic thermal-aware performance optimization for dark silicon many-core systems
title_short DTAPO: Dynamic thermal-aware performance optimization for dark silicon many-core systems
title_full DTAPO: Dynamic thermal-aware performance optimization for dark silicon many-core systems
title_fullStr DTAPO: Dynamic thermal-aware performance optimization for dark silicon many-core systems
title_full_unstemmed DTAPO: Dynamic thermal-aware performance optimization for dark silicon many-core systems
title_sort dtapo: dynamic thermal-aware performance optimization for dark silicon many-core systems
publisher MDPI AG
publishDate 2020
url http://eprints.utm.my/id/eprint/90459/1/MuhammadNadzirMarsono2020_DTaPODynamicThermal-AwarePerformanceOptimization.pdf
http://eprints.utm.my/id/eprint/90459/
http://dx.doi.org/10.3390/electronics9111980
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score 13.211869