Low latency Network-on-Chip router microarchitecture using request masking technique

• Main Authors: Monemi, Alireza, Chia, Yee Ooi, Marsono, Muhammad Nadzir
• Format: Article
• Published: Hindawi Publishing Corporation 2015
• Subjects: TK Electrical engineering. Electronics Nuclear engineering
• Online Access: http://eprints.utm.my/id/eprint/58488/; http://dx.doi.org/10.1155/2015/570836

Network-on-Chip (NoC) is fast emerging as an on-chip communication alternative for many-core System-on-Chips (SoCs). However, designing a high performance low latency NoC with low area overhead has remained a challenge. In this paper, we present a two-clock-cycle latency NoC microarchitecture. An ef...