Pre-charge solution for low-power, area-efficient SAR ADC

• Main Authors: Sarafi, Sahar, Aain, Abu Khari, Bargoshadi, Javad Abbaszadeh, Chegini, Amin
• Format: Article
• Published: The Institute of Electronics, Information and Communication Engineers (IEICE) 2015
• Subjects: TK Electrical engineering. Electronics Nuclear engineering
• Online Access: http://eprints.utm.my/id/eprint/54980/; http://dx.doi.org/10.1587/elex.12.20150546

In this paper, a new method is proposed to reduce the power consumption and occupied area of successive-approximation register analog to digital converters (SAR ADCs). The proposed solution is based on pre-charged capacitor array consisting of identical unit capacitors. According to the new method, switching operations to determine the least significant bits are replaced by adding pre-charged capacitors to the main capacitor array. This method is applicable for binary-weighted capacitor arrays with different switching schemes. With the presented method, switching energy and the number of unit capacitors are reduced by at least 50%.