Epitaxial-template structure utilizing Ge-on-insulator stripe arrays with nanospacing for advanced heterogenous integration on SI platform

• Main Authors: Hashim, Abdul Manaf, Mohammad, Anisuzzaman, Muta, Shunpei, Sadoh, Taizoh, Miyao, Masanobu
• Format: Article
• Published: 2012
• Subjects: QC Physics
• Online Access: http://eprints.utm.my/id/eprint/46930/; http://dx.doi.org/10.1143/JJAP.51.06FF04

A possible Ge-on-insulator (GOI) structure, namely, stripe arrays with nanospacing, was proposed as a promising epitaxial template structure for the Ge epitaxial layer. Agglomeration-free single-crystalline GOI stripe arrays with thickness of 50nm and spacing down to 0.5 μm were successfully grown by the Si-seeded rapid-melting growth technique. The growth of GOI stripe arrays with a spacing of 0.1 μm was not achieved owing due to the severe agglomeration of Ge during the heat treatment. This may be due to the small adhesion area of the capping layer between the stripes where it could not withstand the force caused by Ge agglomeration. From the electron backscattering diffraction (EBSD) measurement, the rotational growth was confirmed by the observation of various orientations when the thickness of the Ge layer was reduced to 20 nm. This is probably due to the decrease in the bulk effects that basically act to prevent the slip of lattice planes. These preliminary results provide a breakthrough towards the realization of heterogeneous integration on Si platforms with multifunctionalities.