Cover Image

Power-aware system-on-chip test scheduling based on enhanced rectangle packing algorithm

Saved in:
Bibliographic Details
Main Author: Sua, Jia Pao
Format: Thesis
Published: 2010
Subjects:
Electrical Engineering
TK Electrical engineering. Electronics Nuclear engineering
Online Access:http://eprints.utm.my/id/eprint/26927/
Tags: Add Tag
No Tags, Be the first to tag this record!
id my.utm.26927
record_format eprints
spelling my.utm.269272012-08-02T08:31:38Z http://eprints.utm.my/id/eprint/26927/ Power-aware system-on-chip test scheduling based on enhanced rectangle packing algorithm Sua, Jia Pao Electrical Engineering TK Electrical engineering. Electronics Nuclear engineering 2010 Thesis NonPeerReviewed Sua, Jia Pao (2010) Power-aware system-on-chip test scheduling based on enhanced rectangle packing algorithm. Masters thesis, Universiti Teknologi Malaysia, Faculty of Electrical Engineering.
institution Universiti Teknologi Malaysia
building UTM Library
collection Institutional Repository
continent Asia
country Malaysia
content_provider Universiti Teknologi Malaysia
content_source UTM Institutional Repository
url_provider http://eprints.utm.my/
topic Electrical Engineering
TK Electrical engineering. Electronics Nuclear engineering
spellingShingle Electrical Engineering
TK Electrical engineering. Electronics Nuclear engineering
Sua, Jia Pao
Power-aware system-on-chip test scheduling based on enhanced rectangle packing algorithm
format Thesis
author Sua, Jia Pao
author_facet Sua, Jia Pao
author_sort Sua, Jia Pao
title Power-aware system-on-chip test scheduling based on enhanced rectangle packing algorithm
title_short Power-aware system-on-chip test scheduling based on enhanced rectangle packing algorithm
title_full Power-aware system-on-chip test scheduling based on enhanced rectangle packing algorithm
title_fullStr Power-aware system-on-chip test scheduling based on enhanced rectangle packing algorithm
title_full_unstemmed Power-aware system-on-chip test scheduling based on enhanced rectangle packing algorithm
title_sort power-aware system-on-chip test scheduling based on enhanced rectangle packing algorithm
publishDate 2010
url http://eprints.utm.my/id/eprint/26927/
_version_ 1643647898836008960
score 13.214268

Similar Items