The performance study of two genetic algorithm approaches for VLSI macro-cell layout area optimization

• Main Authors: Abdul Rahim, Herlina, Abdul Rahman, Azrul Azwan, Ahmad, R. B., Wan Ariffin, Wan N. F., Ahmad, M.I.
• Format: Book Section
• Published: Institute of Electrical and Electronics Engineers 2008
• Subjects: TK Electrical engineering. Electronics Nuclear engineering
• Online Access: http://eprints.utm.my/id/eprint/12782/; http://dx.doi.org/10.1109/AMS.2008.117

Very Large Scale Integrated (VLSI) design has been the subject of much research since the early 1980s where the VLSI cell placement emerges to be a crucial stage in the chip design. Its area optimization is very important in order to reduce the delay and include more functionalities to the designed...