Simplified VHDL Coding of Modified Non-Restoring Square Root Calculator
Square root calculation is one of the most useful and vital operation in digital signal processing which in recent generations of processors, the operation is performed by the hardware. The hardware implementation of the square root operation can be achieved by different means, but it is very depend...
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my.utem.eprints.87512015-05-28T03:59:00Z http://eprints.utem.edu.my/id/eprint/8751/ Simplified VHDL Coding of Modified Non-Restoring Square Root Calculator Jidin, Auzani TK Electrical engineering. Electronics Nuclear engineering Square root calculation is one of the most useful and vital operation in digital signal processing which in recent generations of processors, the operation is performed by the hardware. The hardware implementation of the square root operation can be achieved by different means, but it is very dependent on programmer's sense and ability to write efficient hardware designs. This paper offers universal and shortest VHDL coding of modified non-restoring square root calculator. The main principle of the method is similar with conventional non-restoring algorithm, but it only uses subtract operation and append 01, while add operation and append 11 is not used. The strategy has conducted to implement successfully in FPGA hardware, and offer an efficient in hardware resource, and it is superior. 2012-03-01 Article PeerReviewed application/pdf en http://eprints.utem.edu.my/id/eprint/8751/1/journal_ijres2.pdf Jidin, Auzani (2012) Simplified VHDL Coding of Modified Non-Restoring Square Root Calculator. International Journal of Reconfigurable and Embedded Systems (IJRES). pp. 37-42. ISSN 2089-4864 |
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TK Electrical engineering. Electronics Nuclear engineering Jidin, Auzani Simplified VHDL Coding of Modified Non-Restoring Square Root Calculator |
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Square root calculation is one of the most useful and vital operation in digital signal processing which in recent generations of processors, the operation is performed by the hardware. The hardware implementation of the square root operation can be achieved by different means, but it is very dependent on programmer's sense and ability to write efficient hardware designs. This paper offers universal and shortest VHDL coding of modified non-restoring square root calculator. The main principle of the method is similar with conventional non-restoring algorithm, but it only uses subtract operation and append 01, while add operation and append 11 is not used. The strategy has conducted to implement successfully in FPGA hardware, and offer an efficient in hardware resource, and it is superior. |
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Jidin, Auzani |
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Jidin, Auzani |
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Jidin, Auzani |
title |
Simplified VHDL Coding of Modified Non-Restoring Square Root Calculator |
title_short |
Simplified VHDL Coding of Modified Non-Restoring Square Root Calculator |
title_full |
Simplified VHDL Coding of Modified Non-Restoring Square Root Calculator |
title_fullStr |
Simplified VHDL Coding of Modified Non-Restoring Square Root Calculator |
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Simplified VHDL Coding of Modified Non-Restoring Square Root Calculator |
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simplified vhdl coding of modified non-restoring square root calculator |
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2012 |
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http://eprints.utem.edu.my/id/eprint/8751/1/journal_ijres2.pdf http://eprints.utem.edu.my/id/eprint/8751/ |
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13.18916 |