Reducing Void During Transfer Moulding Of Semiconductor Plastic Package Using

Transfer moulding is a process that generally used at an assembly area in the electronics industry, specifically in the semiconductor plastic packaging industry. This is because the transfer moulding uses an Epoxy Moulding Compound (EMC) material to encapsulate the chip and wire bond that attached t...

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Main Author: Zainul Hashimi, Faridah
Format: Thesis
Language:English
English
Published: 2019
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Online Access:http://eprints.utem.edu.my/id/eprint/24952/1/Reducing%20Void%20During%20Transfer%20Moulding%20Of%20Semiconductor%20Plastic%20Package%20Using.pdf
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spelling my.utem.eprints.249522021-09-29T12:14:21Z http://eprints.utem.edu.my/id/eprint/24952/ Reducing Void During Transfer Moulding Of Semiconductor Plastic Package Using Zainul Hashimi, Faridah T Technology (General) TP Chemical technology Transfer moulding is a process that generally used at an assembly area in the electronics industry, specifically in the semiconductor plastic packaging industry. This is because the transfer moulding uses an Epoxy Moulding Compound (EMC) material to encapsulate the chip and wire bond that attached to the lead frame. The moulding process is important because its function is to protect the chip inside the package and ensure the product performs well. The most common failure occurred during transfer moulding is voids. Voids can cause oxidation on the mould compound resulting from trapped air. Defects can degrade the performance of a product. This defect can be reduced or eliminated and extends the lifespan of the product by improving the transfer moulding parameters. There are four parameters in this project, namely clamp force, cure time, transfer pressure, and transfer speed. EMC from Panasonic was used in this study. The Design of Experiment (DOE) using the Taguchi design method was applied with four factors of input parameters that have three levels to select the optimum transfer moulding process. The responses measured from this experiment is the total area of voids. The total area of voids was measured using CATIA software. Prior to that, the package was X-rayed, and the X-ray image was then transferred to a computer to determine the area of voids. Analysis of results with optimization was conducted to obtain the best combination of process parameters to the transfer moulding response. Analysis of Variance (ANOVA) for the area of voids indicated transfer speed is the most significant parameter with 88.34%. As the transfer speed increased, the total area of voids decreased. Thus, it indicates that transfer speed is the most influential parameter on the transfer moulding process in the semiconductor plastic package. The optimization of the optimum level of parameters which the transfer speed is 3.5 mm/s (Level 3), transfer pressure is 11 MPa (Level 3), clamp force is 250 kN (Level 1) and cure time is 80 s (Level 3) had improved the voids to 80% from 0.009 mm2 to 0.0018 mm2. It shows that by using DOE by Taguchi method, the defect of voids in transfer moulding can be reduced. 2019 Thesis NonPeerReviewed text en http://eprints.utem.edu.my/id/eprint/24952/1/Reducing%20Void%20During%20Transfer%20Moulding%20Of%20Semiconductor%20Plastic%20Package%20Using.pdf text en http://eprints.utem.edu.my/id/eprint/24952/2/Reducing%20Void%20During%20Transfer%20Moulding%20Of%20Semiconductor%20Plastic%20Package%20Using.pdf Zainul Hashimi, Faridah (2019) Reducing Void During Transfer Moulding Of Semiconductor Plastic Package Using. Masters thesis, Universiti Teknikal Malaysia Melaka. https://plh.utem.edu.my/cgi-bin/koha/opac-detail.pl?biblionumber=117932
institution Universiti Teknikal Malaysia Melaka
building UTEM Library
collection Institutional Repository
continent Asia
country Malaysia
content_provider Universiti Teknikal Malaysia Melaka
content_source UTEM Institutional Repository
url_provider http://eprints.utem.edu.my/
language English
English
topic T Technology (General)
TP Chemical technology
spellingShingle T Technology (General)
TP Chemical technology
Zainul Hashimi, Faridah
Reducing Void During Transfer Moulding Of Semiconductor Plastic Package Using
description Transfer moulding is a process that generally used at an assembly area in the electronics industry, specifically in the semiconductor plastic packaging industry. This is because the transfer moulding uses an Epoxy Moulding Compound (EMC) material to encapsulate the chip and wire bond that attached to the lead frame. The moulding process is important because its function is to protect the chip inside the package and ensure the product performs well. The most common failure occurred during transfer moulding is voids. Voids can cause oxidation on the mould compound resulting from trapped air. Defects can degrade the performance of a product. This defect can be reduced or eliminated and extends the lifespan of the product by improving the transfer moulding parameters. There are four parameters in this project, namely clamp force, cure time, transfer pressure, and transfer speed. EMC from Panasonic was used in this study. The Design of Experiment (DOE) using the Taguchi design method was applied with four factors of input parameters that have three levels to select the optimum transfer moulding process. The responses measured from this experiment is the total area of voids. The total area of voids was measured using CATIA software. Prior to that, the package was X-rayed, and the X-ray image was then transferred to a computer to determine the area of voids. Analysis of results with optimization was conducted to obtain the best combination of process parameters to the transfer moulding response. Analysis of Variance (ANOVA) for the area of voids indicated transfer speed is the most significant parameter with 88.34%. As the transfer speed increased, the total area of voids decreased. Thus, it indicates that transfer speed is the most influential parameter on the transfer moulding process in the semiconductor plastic package. The optimization of the optimum level of parameters which the transfer speed is 3.5 mm/s (Level 3), transfer pressure is 11 MPa (Level 3), clamp force is 250 kN (Level 1) and cure time is 80 s (Level 3) had improved the voids to 80% from 0.009 mm2 to 0.0018 mm2. It shows that by using DOE by Taguchi method, the defect of voids in transfer moulding can be reduced.
format Thesis
author Zainul Hashimi, Faridah
author_facet Zainul Hashimi, Faridah
author_sort Zainul Hashimi, Faridah
title Reducing Void During Transfer Moulding Of Semiconductor Plastic Package Using
title_short Reducing Void During Transfer Moulding Of Semiconductor Plastic Package Using
title_full Reducing Void During Transfer Moulding Of Semiconductor Plastic Package Using
title_fullStr Reducing Void During Transfer Moulding Of Semiconductor Plastic Package Using
title_full_unstemmed Reducing Void During Transfer Moulding Of Semiconductor Plastic Package Using
title_sort reducing void during transfer moulding of semiconductor plastic package using
publishDate 2019
url http://eprints.utem.edu.my/id/eprint/24952/1/Reducing%20Void%20During%20Transfer%20Moulding%20Of%20Semiconductor%20Plastic%20Package%20Using.pdf
http://eprints.utem.edu.my/id/eprint/24952/2/Reducing%20Void%20During%20Transfer%20Moulding%20Of%20Semiconductor%20Plastic%20Package%20Using.pdf
http://eprints.utem.edu.my/id/eprint/24952/
https://plh.utem.edu.my/cgi-bin/koha/opac-detail.pl?biblionumber=117932
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score 13.160551