A simulation study of thickness effect in performance of double lateral gate junctionless transistors
The electrical behaviour of double lateral gate junctionless transistors, regarding to the variation of channel thickness is investigated, through 3-D numerical simulations. The simulation results explicitly show that how the device thickness affect the on and off current and threshold voltage behav...
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IEEE
2013
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Online Access: | http://psasir.upm.edu.my/id/eprint/69169/1/A%20simulation%20study%20of%20thickness%20effect%20in%20performance%20of%20double%20lateral%20gate%20junctionless%20transistors.pdf http://psasir.upm.edu.my/id/eprint/69169/ |
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my.upm.eprints.691692019-06-12T07:36:20Z http://psasir.upm.edu.my/id/eprint/69169/ A simulation study of thickness effect in performance of double lateral gate junctionless transistors Larki, Farhad Dehzangi, Arash Hamidon, Mohd Nizar Md. Ali, Sawal Hamid Jalar @ Jalil, Azman Islam, Md. Shabiul The electrical behaviour of double lateral gate junctionless transistors, regarding to the variation of channel thickness is investigated, through 3-D numerical simulations. The simulation results explicitly show that how the device thickness affect the on and off current and threshold voltage behavior based on variation of the carriers density and recombination rates of the carriers. As the channel thickness is decreased, the amount of bulk neutral channel getting smaller which cause a decrease in the on state current. Meanwhile, the lateral gate influence on the channel is reinforced, which cause a decrease in leakage current in the off state. Threshold voltage is decreased as the channel thickness decreases. However, the recombination rate of carriers increases with decreasing the channel thickness, due to the accumulation of minority carries and shifted to the source side of the channel. IEEE 2013 Conference or Workshop Item PeerReviewed text en http://psasir.upm.edu.my/id/eprint/69169/1/A%20simulation%20study%20of%20thickness%20effect%20in%20performance%20of%20double%20lateral%20gate%20junctionless%20transistors.pdf Larki, Farhad and Dehzangi, Arash and Hamidon, Mohd Nizar and Md. Ali, Sawal Hamid and Jalar @ Jalil, Azman and Islam, Md. Shabiul (2013) A simulation study of thickness effect in performance of double lateral gate junctionless transistors. In: 2013 IEEE Regional Symposium on Micro and Nano Electronics (RSM 2013), 25-27 Sept. 2013, Langkawi, Kedah, Malaysia. (pp. 89-92). 10.1109/RSM.2013.6706480 |
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The electrical behaviour of double lateral gate junctionless transistors, regarding to the variation of channel thickness is investigated, through 3-D numerical simulations. The simulation results explicitly show that how the device thickness affect the on and off current and threshold voltage behavior based on variation of the carriers density and recombination rates of the carriers. As the channel thickness is decreased, the amount of bulk neutral channel getting smaller which cause a decrease in the on state current. Meanwhile, the lateral gate influence on the channel is reinforced, which cause a decrease in leakage current in the off state. Threshold voltage is decreased as the channel thickness decreases. However, the recombination rate of carriers increases with decreasing the channel thickness, due to the accumulation of minority carries and shifted to the source side of the channel. |
format |
Conference or Workshop Item |
author |
Larki, Farhad Dehzangi, Arash Hamidon, Mohd Nizar Md. Ali, Sawal Hamid Jalar @ Jalil, Azman Islam, Md. Shabiul |
spellingShingle |
Larki, Farhad Dehzangi, Arash Hamidon, Mohd Nizar Md. Ali, Sawal Hamid Jalar @ Jalil, Azman Islam, Md. Shabiul A simulation study of thickness effect in performance of double lateral gate junctionless transistors |
author_facet |
Larki, Farhad Dehzangi, Arash Hamidon, Mohd Nizar Md. Ali, Sawal Hamid Jalar @ Jalil, Azman Islam, Md. Shabiul |
author_sort |
Larki, Farhad |
title |
A simulation study of thickness effect in performance of double lateral gate junctionless transistors |
title_short |
A simulation study of thickness effect in performance of double lateral gate junctionless transistors |
title_full |
A simulation study of thickness effect in performance of double lateral gate junctionless transistors |
title_fullStr |
A simulation study of thickness effect in performance of double lateral gate junctionless transistors |
title_full_unstemmed |
A simulation study of thickness effect in performance of double lateral gate junctionless transistors |
title_sort |
simulation study of thickness effect in performance of double lateral gate junctionless transistors |
publisher |
IEEE |
publishDate |
2013 |
url |
http://psasir.upm.edu.my/id/eprint/69169/1/A%20simulation%20study%20of%20thickness%20effect%20in%20performance%20of%20double%20lateral%20gate%20junctionless%20transistors.pdf http://psasir.upm.edu.my/id/eprint/69169/ |
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1643839415594778624 |
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13.160551 |