Double adjacent error correction codes for ultra-fast cache memories
Error correction codes are commonly used to protect cache memories from soft errors. As technology feature size scales deeper into sub-nanometer regime, radiation-induced soft error can causes double adjacent error (DAE). Several double adjacent error correction (DAEC) codes have been introduced to...
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| 主要な著者: | , |
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| フォーマット: | 論文 |
| 言語: | English |
| 出版事項: |
Institute of Electrical and Electronics Engineers
2025
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| オンライン･アクセス: | http://psasir.upm.edu.my/id/eprint/115433/1/115433.pdf http://psasir.upm.edu.my/id/eprint/115433/ https://ieeexplore.ieee.org/document/10813377/ |
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